Simulation of Arithmetical Circuits by Branching Programs with Preservation of Constant Width and Syntactic Multilinearity

We study structural properties of restricted width arithmetical circuits. It is shown that syntactically multilinear arithmetical circuits of constant width can be efficiently simulated by syntactically multilinear algebraic branching programs of constant width, i.e. that sm-VSC ⊆ sm-VBWBP. Also, we obtain a direct characteriztion of poly-size arithmetical formulas in terms of multiplicatively disjoint constant width circuits, i.e. MD-VSC = VNC. For log-width weakly-skew circuits a width efficient multilinearity preserving simulation by algebraic branching programs is given, i.e. weaklyskew-sm-VSC ⊆ sm-VBP[width=log n]. Finally, coefficient functions are considered, and closure properties are observed for sm-VSC, and in general for a variety of other syntactic multilinear restrictions of algebraic complexity classes.